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+/* |
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+ * Author: Pawel Jablonski |
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+ * E-mail: pj@xirx.net |
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+ * WWW: xirx.net |
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+ * GIT: git.xirx.net |
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+ * |
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+ * License: You can use this code however you like |
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+ * but leave information about the original author. |
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+ * Code is free for non-commercial and commercial use. |
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+ */ |
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+ |
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+#ifndef INSTRUCTION_H |
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+#define INSTRUCTION_H |
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+ |
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+#include <QString> |
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+#include <QList> |
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+ |
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+//! This class contains a one description of the CPU instruction |
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+class Instruction |
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+{
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+ public: |
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+ //! Definitions of the instruction argument types |
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+ enum class Arg |
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+ {
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+ None, //!< No argument |
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+ ABXY, //!< Main and auxiliary registers |
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+ AB, //!< Only main registers |
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+ Val256, //!< 8 bit unsigned value |
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+ Addr //!< 16 bit unsigned address |
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+ }; |
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+ |
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+ Instruction(const QString &name, unsigned char opcode, Arg arg0 = Arg::None, Arg arg1 = Arg::None, Arg arg2 = Arg::None, unsigned char opcodeSecond = 0, Arg arg0Second = Arg::None, Arg arg1Second = Arg::None, Arg arg2Second = Arg::None); |
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+ |
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+ const QString &getName() const; |
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+ unsigned char getOpcode() const; |
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+ const QList<Arg> &getArgList() const; |
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+ |
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+ unsigned char getOpcodeSecond() const; |
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+ const QList<Arg> &getArgSecondList() const; |
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+ |
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+ private: |
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+ QString name; //!< Instruction name |
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+ unsigned char opcode; //!< Opcode of the defined instruction |
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+ QList<Arg> argList; //!< Argument list of the defined instruction |
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+ |
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+ unsigned char opcodeSecond; //!< Second optional opcode of the defined instruction used for a two-step instruction type |
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+ QList<Arg> argSecondList; //!< Second optional argument list of the defined instruction used for a two-step instruction type |
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+}; |
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+ |
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+#endif |